Leakage Power Reduction of Asynchronous Circuits: Complexity Analysis and Efficient Optimal Algorithm

This paper studies the problem of leakage power optimization in asynchronous circuits using dual threshold voltages technique. It proposes an efficient algorithm based on quantum computing concepts, such as quantum bit and superposition of states, which finds the optimal high and low threshold voltage assignment. The utilized circuit model is a Timed PetriNet which supports hierarchical circuit models. Our proposed method leads to leakage power reduction while still maintaining high performance of circuits. The experimental results on a set of benchmark circuits show that this technique can achieve on average 60% savings for leakage power, while there is only 10% performance penalty.